SAVE THE DATE Tapia 2018 Orlando, FL September 19-22, 2018

2017 Tapia Conference

Computation on an Intel Xeon Phi (aka Knights Landing or KNL) Platform

Saturday, September 23, 2017 — 8:00AM - 5:00PM

This workshop introduces participants to computing on the newest platform within the DOE Facilities. The NERSC Cori system, named for American biochemist Gerty Cori, is comprised of both the Intel Xeon “Haswell” and Xeon Phi “Knight’s Landing” compute nodes and a Cray Data Warp burst buffer. Participants will learn about the Knight’s Landing processor, its capabilities, its computing environment, the slurm batch system, and the storage environment as part of the introduction. Next, they will then learn and practice with the new memory hierarchy, how to leverage different CPU cache levels and memory allocation to jobs. In the afternoon, they will learn how to use the new burst buffer and optimize codes on this new platform. Be one of the early group of researchers to experience computing on the Intel Xeon Phi platform.

This workshop will be presented by staff from the National Energy Research Scientific Computing Center at Lawrence Berkeley National Laboratory

Requirements: Participants must have a working log on to Cori at least 30 days prior to the workshop event. You will be given instructions on how to get an account. You should have some experience in programming, should have been able to write new code or edit an existing one. You should have some experience is submitting jobs to a batch system and receiving output.

Workshop Schedule

8:00 a.m. - 10 a.m. - Introduction to the KNL platform - provider: Mario Melara, NERSC, Lawrence Berkeley National Lab

This hands-on tutorial will start with an overview of a KNL system using NERSC Cori and will cover the following topics: available compute nodes, filesystems and runtime environment. We will introduce the batch environment - slurm - and walk through writing, submitting and monitoring a job. We will then introduce the software environment and work through building and running a simple application. Finally, we will touch on some more advanced aspects of running jobs on Cori, such as task and process placement.

10.00am - 10.30am - Break

10:30 p.m. - 12:00 p.m. - (Hackathon) Leveraging Burst Buffer on Cori - provider: Debbie Bard, NERSC, Lawrence Berkeley National Lab

Burst Buffer technology is now being deployed on major supercomputing systems. In this tutorial we will introduce how Burst Buffers have been configured on Cori at NERSC and discuss briefly early experience with Burst Buffers from both a system and a user’s perspective. Attendees will be given access to Cori, NERSC’s newest supercomputer, and will use the Cori Burst Buffer in a series of exercises designed to demonstrate the IO capabilities of the SSD storage at scale, as well as some of the limitations.

12:00 p.m. - 1:00 p.m. - lunch

1.00pm - 1.30pm: Introduction to OpenMP - provider: Brian Friesen, NERSC, Lawrence Berkeley National Lab

Modern HPC architectures exhibit a large amount of parallel computing capability within each compute node. Taking advantage of this parallelism is critical for an application to achieve high performance. In this talk we introduce OpenMP, a collection of compiler directives, library routines, and environment variables. These components work together to allow application developers to express on-node parallelism in C, C++, and Fortran.

1.30pm - 3.00pm: (Hackathon) Optimization Challenge on Cori - provider: Brian Friesen, NERSC, Lawrence Berkeley National Lab

This advanced, hands-on session is designed to teach participants concepts and strategies for optimizing applications on exascale-like HPC architectures. Attendees will learn to profile a short HPC code with Intel and Cray optimization tools to identify hotspots, bottlenecks and areas to parallelize. Participants will then get a chance to optimize the code on the Intel Xeon Phi Cori system at NERSC. The team with the fastest version at the end of the day will earn eternal glory in CSGF history (and perhaps a small prize).

3:00 p.m. - 3:30 p.m. - Break

3:15 p.m. - 5:00 p.m. - Hackathon continued

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